JPH0526273B2 - - Google Patents

Info

Publication number
JPH0526273B2
JPH0526273B2 JP55128598A JP12859880A JPH0526273B2 JP H0526273 B2 JPH0526273 B2 JP H0526273B2 JP 55128598 A JP55128598 A JP 55128598A JP 12859880 A JP12859880 A JP 12859880A JP H0526273 B2 JPH0526273 B2 JP H0526273B2
Authority
JP
Japan
Prior art keywords
clock
intermittent
output
circuit
continuous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55128598A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5753811A (en
Inventor
Ken Ooshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Olympus Corp
Original Assignee
Olympus Optical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympus Optical Co Ltd filed Critical Olympus Optical Co Ltd
Priority to JP55128598A priority Critical patent/JPS5753811A/ja
Publication of JPS5753811A publication Critical patent/JPS5753811A/ja
Publication of JPH0526273B2 publication Critical patent/JPH0526273B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP55128598A 1980-09-18 1980-09-18 Clock demodulating circuit Granted JPS5753811A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55128598A JPS5753811A (en) 1980-09-18 1980-09-18 Clock demodulating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55128598A JPS5753811A (en) 1980-09-18 1980-09-18 Clock demodulating circuit

Publications (2)

Publication Number Publication Date
JPS5753811A JPS5753811A (en) 1982-03-31
JPH0526273B2 true JPH0526273B2 (en]) 1993-04-15

Family

ID=14988725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55128598A Granted JPS5753811A (en) 1980-09-18 1980-09-18 Clock demodulating circuit

Country Status (1)

Country Link
JP (1) JPS5753811A (en])

Also Published As

Publication number Publication date
JPS5753811A (en) 1982-03-31

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